S1 · Computer Organization & the RISC-V ISA
25 min
Day 37: Hand-assemble and disassemble on paper
Assembling an instruction to its 32-bit word by hand — and back — is the exercise that makes the encoding permanent.
Hand-assemble and disassemble
Nothing cements the formats like doing them by hand. Take an instruction, look up its opcode/funct3/funct7, place the register numbers and (scrambled) immediate bits, and produce the 32-bit hex word. Then reverse it: given a hex word, peel off the fields and recover the mnemonic. Your ISS decoder (Day 53) is exactly this, in code.
Hand-assembling addi x5, x6, 10
addi is I-format: imm[11:0] | rs1[5] | funct3[3] | rd[5] | opcode[7]
opcode(addi) = 0010011 funct3(addi) = 000
rd = x5 = 00101 rs1 = x6 = 00110 imm = 10 = 0000 0000 1010
bits: 000000001010 | 00110 | 000 | 00101 | 0010011
group into nibbles -> 0000 0000 1010 0011 0000 0010 1001 0011
= 0x00A30293
Disassemble 0x00A30293: opcode 0010011 + funct3 000 -> addi,
rd=00101 (x5), rs1=00110 (x6), imm=0x00A=10 -> addi x5, x6, 10 ✓You are the decoder
Doing this by hand a dozen times builds the same lookup tables your hardware will use as literal wiring. When the ISS decoder or the Stage-2 RTL control unit 'reads opcode 0110011 and routes to the ALU,' you'll know precisely what that means because you did it with a pencil first.
Ship for Day 37
Assembling addi x5, x6, 10 gives 0x00A30293. What does the low 7 bits (0010011) represent?
