Day 17: Building gates from 74xx ICs on a breadboard
Hands-on logic with the 74xx family
The 74xx series packs logic gates into small DIP chips — the physical toolkit for learning digital by touch. Core parts: 7400 (quad NAND), 7404 (hex inverter), 7408 (quad AND), 7432 (quad OR), 7486 (quad XOR). Every chip needs Vcc and GND wired first (get this wrong and nothing — or the chip — works), then you connect inputs and read outputs on LEDs.
Universality, made real
Yesterday you proved NAND is universal on paper. Today build it: a 7400 alone can produce NOT, AND, and OR. Tie a NAND's inputs together and it's an inverter; feed a NAND into another NAND-inverter and you get AND; invert both inputs first (via NAND-inverters) and you get OR (De Morgan again).
NOT A = NAND(A, A)
AND(A,B) = NOT( NAND(A,B) ) = NAND( NAND(A,B), NAND(A,B) )
OR(A,B) = NAND( NOT A, NOT B ) = NAND( NAND(A,A), NAND(B,B) ) [De Morgan]
Wire it on a breadboard, drive inputs with switches, watch the LED,
and confirm each truth table by hand.Build: the universal-NAND breadboard
On a breadboard with a single 7400, build NOT, AND, and OR using only NAND gates, with input switches and LED outputs. Verify each truth table. Keep it — it's a photo for docs/stage0/ and the moment 'NAND is universal' stops being a slogan.
Datasheet first, wires second
Always pull the datasheet and check the pinout before wiring — pin 14 is usually Vcc, pin 7 GND, but never assume. Add a decoupling capacitor across Vcc/GND. Reading datasheets end-to-end is a continuous-track skill; start the habit on a 40-cent chip, not a $300 board.
Key terms
- DIP package
- Dual in-line package — the through-hole chip body with two rows of pins for breadboards.
- Vcc / GND
- Supply and ground pins that must be connected for any logic IC to function.
- Datasheet
- The manufacturer's spec: pinout, logic levels, timing, and limits — read before wiring.
- Decoupling capacitor
- A small cap across Vcc/GND near a chip to steady its supply during switching.
Ship for Day 17
How do you make an inverter (NOT) from a single 2-input NAND gate?
