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S0 · CMOS Fundamentals + Digital Logic
30 min

Day 32: Project: the 4-digit combination lock

A combination lock is a sequence detector with attitude: it rewards the exact right sequence and punishes any wrong step — pure FSM design.

An FSM with consequences

The 4-digit combination lock is your third breadboard build and a satisfying FSM: it advances through a chain of states as the correct digits arrive, asserts unlock when the full sequence completes, and resets to the start on any wrong input. It generalizes the sequence detector — same 'how much of the target have I matched' state idea, plus an explicit failure path.

Implement it your way: wire it on the breadboard with 74xx flip-flops and gates (input from buttons/switches, unlock drives an LED or relay), or encode it in your Day-30/31 simulator and drive it with a digit stream. Either path exercises the full design flow — diagram, table, encoding, logic — one more time before you leave Stage 0.

Build: the 4-digit combination lock

Design the lock FSM (state diagram → table → logic), then build or simulate it. It must unlock only on the exact 4-digit sequence and reset on any wrong entry. Capture it for docs/stage0/ as your third required build (alongside the counter and traffic light).

Key terms

Reset transition
An FSM edge from any state back to the start on invalid input — the lock’s failure path.
Accepting state
The state reached only by the exact correct sequence (here, UNLOCK).
Guarded transition
A state change taken only when an input condition (the correct digit) holds.

Ship for Day 32

In the combination-lock FSM, what should happen on a wrong digit from any intermediate state?

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    Day 32: Project: the 4-digit combination lock | RBTechIconX