Skip to main content...
S2 · Verilog RTL Design
25 min

Day 67: Building block: priority arbiters

A priority arbiter decides who gets a shared resource when several request it at once — the heart of any bus or interrupt controller.

Building block: priority arbiters

When several requesters compete for one resource (a bus, a port, an interrupt line), an arbiter grants exactly one. A fixed-priority arbiter always favors the lowest-index requester (simple, but can starve others). A round-robin arbiter rotates priority so everyone gets a turn (fair, slightly more logic). The one-hot grant must assert for exactly one requester.

A fixed-priority arbiter (lowest index wins), one-hot grant
module arbiter #(parameter N = 4) (
    input      [N-1:0] req,
    output     [N-1:0] grant
);
    // grant the lowest-index request: req & (~(req-1))
    // isolates the least-significant set bit
    assign grant = req & (~req + 1'b1);
endmodule
// e.g. req = 4'b1010 -> grant = 4'b0010 (index 1 wins)

Fairness vs simplicity

Fixed priority is one line but can starve low-priority requesters under load; round-robin adds a rotating pointer to guarantee fairness. ChipX's AXI fabric (Day 91) has a single master so arbitration is trivial there, but you'll want a real arbiter thinking for interrupt prioritization and any multi-master extension. 'Design a round-robin arbiter' is a common interview ask.

Ship for Day 67

What is the main drawback of a fixed-priority arbiter compared to round-robin?

We use cookies

We use cookies to enhance your browsing experience, serve personalized content, and analyze our traffic. By clicking "Accept All", you consent to our use of cookies. Learn more

    Day 67: Building block: priority arbiters | RBTechIconX